This section provides background information related to the present disclosure which is not necessarily prior art.
FIG. 1 shows an exemplary embodiment of a conventional Group III-nitride semiconductor light emitting device, in which the Group III-nitride semiconductor light emitting device includes a substrate 10 (e.g., a sapphire substrate), a buffer layer 20 grown on the substrate 10, an n-type Group III-nitride semiconductor layer 30 grown on the buffer layer 20, an active layer 40 grown on the n-type Group III-nitride semiconductor layer 30, a p-type Group III-nitride semiconductor layer 50 grown on the active layer 40, a current spreading conductive film 60 formed on the p-type Group III-nitride semiconductor layer 50, a p-side bonding pad 70 formed on the current spreading conductive film 60, an n-side bonding pad 80 formed on an exposed region of the n-type Group III-nitride semiconductor layer 30 created by mesa etching the p-type Group III-nitride semiconductor layer 50 and the active layer 40, and a protective film 90.
FIG. 2 shows an exemplary embodiment of the semiconductor light emitting device disclosed in U.S. Pat. No. 7,262,436, in which the semiconductor light emitting device includes a substrate 100, an n-type semiconductor layer 300 grown on the substrate 100, an active layer 400 grown on the n-type semiconductor layer 300, a p-type semiconductor layer 500 grown on the active layer 400, electrodes 901, 902 and 903 formed on the p-type semiconductor layer 500, with the electrodes serving as reflective films, and an n-side bonding pad 800 formed on the n-type semiconductor layer 300 which had been etched and exposed.
A chip having the above structure, i.e. a chip where all of the electrodes 901, 902 and 903, and the electrode 800 are formed on one side of the substrate 100, with the electrodes 901, 902 and 903 serving as reflective films, is called a flip chip. The electrodes 901, 902 and 903 are made up of an electrode 901 (e.g., Ag) having a high reflectance, an electrode 903 (e.g., Au) for bonding, and an electrode 902 (e.g., Ni) for preventing diffusion between materials of the electrode 901 and materials of the electrode 903. While this metal reflective film structure has a high reflectance and is advantageous for current spreading, it has the drawback that the metal absorbs light.
FIG. 3 shows an exemplary embodiment of the semiconductor light emitting device disclosed in JP Laid-Open Pub. No. 2006-20913, in which the semiconductor light emitting device includes a substrate 100, a buffer layer grown on the substrate 100, an n-type semiconductor layer 300 grown on the buffer layer 200, an active layer 400 grown on the n-type semiconductor layer 300, a p-type semiconductor layer 500 grown on the active layer 400, a light transmitting conductive film 600 with a current spreading function, which is formed on the p-type semiconductor layer 500, a p-side bonding pad 700 formed on the light transmitting conductive film 600, and an n-side bonding pad 800 formed on the n-type semiconductor layer 300 which had been etched and exposed. Further, a DBR (Distributed Bragg Reflector) 900 and a metal reflective film 904 are provided on the light transmitting conductive film 600. While this structure shows reduced light absorption by the metal reflective film 904, it has the drawback that current spreading is not facilitated, as compared with the structure using the electrodes 901, 902 and 903.
FIG. 4 shows an exemplary embodiment of serially connected LEDs (A, B) disclosed in U.S. Pat. No. 6,547,249. Because of several advantages that can be offered, multiple LEDs (A, B) connected in series as shown in FIG. 4 have been used. For instance, series connection of multiple LEDs (A, B) decreases the number of external circuits and wire connections, and reduces the loss of light absorbed by wires. In addition, these serially connected LEDs (A, B) increase an overall operating voltage such that a power supply circuit may have a simpler configuration.
In order to connect multiple LEDs (A, B) in series, interconnects 34 are then deposited to connect a p-side electrode 32 and an n-side electrode 32 of adjacent LEDs (A, B). However, in an isolation process of electrically insulating the multiple LEDs (A, B), multiple semiconductor layers are etched to a rather considerable depth, so as to expose a sapphire substrate 20. This process is time-consuming and creates a big gap, thereby making it difficult to form the interconnects 34. Although a dielectric material 30 was used to obtain such a gently sloped interconnect 34 as shown in FIG. 4, this increased a spacing between LEDs (A, B) and is detrimental to higher integration.
FIG. 5 shows an exemplary embodiment of a semiconductor light emitting device disclosed in U.S. Pat. No. 7,098,543, in which a structure having a SMD-type flip chip 100 and a Zener diode 200 as an ESD protection device being connected is illustrated.